Resin-sealed semiconductor device

ABSTRACT

A resin-sealed semiconductor device has a first semiconductor chip whose circuit surface is bonded to a surface of a die pad. The back surface of a second semiconductor chip is bonded to the back surface of the first semiconductor chip. Each of the semiconductor chips is connected by wire to outer lead respectively. A sealing resin is provided for encapsulating the die pad, the first and second semiconductor chips and the wires so that the other surface of the die pad is exposed.

BACKGROUND OF THE INVENTION

[0001] 1. Field of the Invention

[0002] The present invention relates to a resin-sealed semiconductordevice, and more specifically to a resin-sealed semiconductor devicecomprising a plurality of semiconductor chips.

[0003] 2. Background Art

[0004]FIG. 8 is a sectional view schematically showing a resin-sealedsemiconductor device comprising two semiconductor chips as an example ofconventional multi-chip package i.e. MCP.

[0005] In FIG. 8, reference numeral 1 denotes a die pad that holdsemiconductor chips; 2 denotes a first semiconductor chip whose back isbonded with an insulating adhesive 3 on a surface, i.e. the uppersurface in FIG. 8, of the die pad 1; 4 denotes a second semiconductorchip whose back is bonded with the insulating adhesive 3 on the othersurface, i.e. the lower surface in FIG. 8, of the die pad 1; 5 denotesouter leads for connecting the first semiconductor chip 2 and secondsemiconductor chip 4 to external circuits (not shown); 6 denotes wiresfor connecting the circuit surface of the first semiconductor chip 2with the outer leads 5; 7 denotes wires for connecting the circuitsurface of the second semiconductor chip 4 with the outer leads 5; and 8denotes a sealing resin for encapsulating the die pad 1, the firstsemiconductor chip 2, the second semiconductor chip 4, wires 6 and 7,and the inner ends of the outer leads 5 as shown in FIG. 8.

[0006]FIG. 9 is a sectional view schematically showing a resin-sealedsemiconductor device comprising three semiconductor chips. Thissemiconductor device is constituted of a first semiconductor chip 2 anda second semiconductor chip 4 of the same size as in FIG. 8, andfurthermore, a third semiconductor chip 9 whose back is bonded to thecircuit surface of the first semiconductor chip 2 through an insulatingadhesive 3. The third semiconductor chip 9 is connected to the outerleads 5 with wires 10, and the semiconductor chips 2, 4, 9 and wires 6,7, 10 are sealed with a sealing resin 8 as shown in FIG. 9.

[0007] Conventional MCPs are constituted as described above, and in asemiconductor device comprising two semiconductor chips as shown in FIG.8, since the thickness of each semiconductor chip is about 0.2 mm, thetotal height Ha from the bottom of the outer leads 5 to the top of thesealing resin 8 is 0.9 to 1.2 mm. However, if the thicknesses of thesealing resin 8 in the upper and lower sides are reduced to meet therequirements of thickness reduction, the problem that the wires 6 and 7are exposed on the surface of the package arises. Also, in thesemiconductor device comprising three semiconductor chips as shown inFIG. 9, although the total height Ha from the bottom of the outer leads5 to the top of the sealing resin 8 is made 0.9 to 1.2 mm as in the caseof FIG. 8, by reducing the thickness of each semiconductor chip to asthin as 0.09 to 0.15 mm, the reduction of the thickness of the device byreducing the thickness of each component has a problem of the presenceof limitation on manufacturing.

[0008] Therefore, the object of the present invention is to solve theabove-described problems, and to provide a resin-sealed semiconductordevice that enables the total height to be reduced without reducing thethickness of each component.

SUMMARY OF THE INVENTION

[0009] According to one aspect of the present invention, a resin-sealedsemiconductor device has a die pad and a first semiconductor chip whosecircuit surface is bonded to one surface of the die pad. The backsurface of a second semiconductor chip is bonded to the back surface ofthe first semiconductor chip. Wires are provided for connecting each ofthe semiconductor chips to outer leads. Further, a sealing resin isprovided for encapsulating the diepad, the first and secondsemiconductor chips and the wires so that the other surface of the diepad is exposed.

[0010] According to another aspect of the present invention, aresin-sealed semiconductor device has a die pad and a firstsemiconductor chip whose circuit surface is bonded to one surface of thedie pad. The circuit surface, i.e. the front surface, of a secondsemiconductor chip is bonded to the back of the first semiconductorchip. Wires are provided for connecting each of the semiconductor chipsto outer leads. Further, a sealing resin is provided for encapsulatingthe die pad, the first and second semiconductor chips and the wires sothat the other surface of the die pad and the back of the secondsemiconductor chip are exposed.

[0011] Other features and advantages of the invention will be apparentfrom the following description taken in connection with the accompanyingdrawings.

BRIEF DESCRIPTION OF THE DRAWINGS

[0012]FIG. 1 is a sectional view schematically showing the constitutionof First Embodiment, and shows an example of the case where twosemiconductor chips are mounted.

[0013]FIG. 2 is a sectional view schematically showing the constitutionof Second Embodiment, and shows an example of the case where threesemiconductor chips are mounted.

[0014]FIG. 3 is a sectional view schematically showing the modificationof the constitution in Second Embodiment.

[0015]FIG. 4 is a sectional view schematically showing the constitutionof Third Embodiment, and shows another example of the case where twosemiconductor chips are mounted.

[0016]FIG. 5 is a sectional view schematically showing the constitutionof Fourth Embodiment.

[0017]FIG. 6 is a sectional view schematically showing the constitutionof Fifth Embodiment.

[0018]FIG. 7 is a sectional view schematically showing the constitutionof Sixth Embodiment.

[0019]FIG. 8 is a sectional view schematically showing a conventionalresin-sealed semiconductor device comprising two semiconductor chips.

[0020]FIG. 9 is a sectional view schematically showing a conventionalresin-sealed semiconductor device comprising three semiconductor chips.

DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0021] First Embodiment

[0022] First Embodiment of the present invention will be described belowreferring to the drawing. FIG. 1 is a sectional view schematicallyshowing the constitution of First Embodiment, and shows an example ofthe case where two semiconductor chips are mounted. In FIG. 1, referencenumeral 1 denotes a die pad for holding semiconductor chips, 15 denotesa first semiconductor chip whose circuit surface is bonded with aninsulating adhesive 3, such as a polyimide tape and an epoxy-basedresin, on a surface, i.e. the lower surface in FIG. 1, of the die pad 1;16 denotes a second semiconductor chip whose back is bonded with theinsulating adhesive 3 on the back of the first semiconductor chip 15; 5denotes outer leads for connecting the first semiconductor chip 15 andsecond semiconductor chip 16 to external circuits (not shown); 17denotes wires for connecting the circuit surface of the firstsemiconductor chip 15 with the outer leads 5; 18 denotes wires forconnecting the circuit surface of the second semiconductor chip 16 withthe outer leads 5; and 8 denotes a sealing resin for encapsulating thedie pad 1, the first semiconductor chip 15, the second semiconductorchip 16, wires 17 and 18, and the inner ends of the outer leads 5 in thestate where the other surface of the die pad 1 is exposed as shown inFIG. 1.

[0023] According to First Embodiment, which is constituted as describedabove, the circuit surface of the first semiconductor chip 15 can beprotected from the environment by bonding the circuit surface of thefirst semiconductor chip 15 to a surface of the die pad 1; and the totalthickness of the semiconductor device can be thinned by exposing theother surface of the die pad 1 to the environment. In the case of FIG.1, the total height Hc from the bottom of the outer lead 5 to the uppersurface of the sealing resin 8, that is, the other surface of the diepad 1, becomes 0.7 mm.

[0024] Second Embodiment

[0025] Next, Second Embodiment of the present invention will bedescribed below referring to the drawing. FIG. 2 is a sectional viewschematically showing the constitution of Second Embodiment, and showsan example of the case where three semiconductor chips are mounted. InFIG. 2, the same or corresponding parts shown in FIG. 1 are denoted bythe same reference numerals, and the description thereof will beomitted. What is different from the semiconductor device shown in FIG. 1is that the circuit surface of the second semiconductor chip 19 isbonded to the back of the first semiconductor chip 15 with an insulatingadhesive 3, the circuit surface of the second semiconductor chip 19 isconnected to outer leads 5 with wires 20, the back of the thirdsemiconductor chip 21 is bonded to the back of the second semiconductorchip 19 with the insulating adhesive 3, and the circuit surface of thethird semiconductor chip 21 is connected to outer leads 5 with wires 22.

[0026] According to Second Embodiment, which is constituted as describedabove, the total height Hd from the bottom of the outer lead 5 to theother surface of the die pad 1 becomes 0.7 mm as in the semiconductordevice shown in FIG. 1 by thinning the thickness of semiconductor chips15, 19, and 21 to 0.09 to 0.15 mm as in the case of FIG. 9, and byexposing the other surface of the die pad 1.

[0027] Alternatively, the first semiconductor chip 15, the secondsemiconductor chip 19, and the third semiconductor chip 21 can be madeupside down in the connected state of FIG. 2, and the circuit surface ofthe third semiconductor chip 21 can be bonded to a surface of the diepad 1 with an insulating adhesive 3 as FIG. 3 shows. In this case, thetotal Hd is unchanged

[0028] Third Embodiment

[0029] Next, Third Embodiment of the present invention will be describedbelow referring to the drawing. FIG. 4 is a sectional view schematicallyshowing the constitution of Third Embodiment, and shows another exampleof the case where two semiconductor chips are mounted. In FIG. 4, thesame or corresponding parts shown in FIG. 1 are denoted by the samereference numerals, and the description thereof will be omitted. What isdifferent from the semiconductor device shown in FIG. 1 is that thecircuit surface of the second semiconductor chip 16 in FIG. 1 is bondedto the back of the first semiconductor chip 15 with an insulatingadhesive 3, and the back of the second semiconductor chip 16 is alsoexposed to the environment.

[0030] Even if the second semiconductor chip 16 is exposed to theenvironment, the reliability of the device is not affected.

[0031] By such a constitution, the total height He from the bottom ofthe outer lead 5 to the other surface of the die pad 1 becomes 0.5 mm,and the device can be further thinned compared with the device of FIG.1.

[0032] Fourth Embodiment

[0033] Next, Fourth Embodiment of the present invention will bedescribed below referring to the drawing. FIG. 5 is a sectional viewschematically showing the constitution of Fourth Embodiment. In FIG. 5,the same or corresponding parts with those shown in FIG. 4 are denotedby the same reference numerals, and the description thereof will beomitted. What is different from the semiconductor device shown in FIG. 4is that a step or cut-off is formed on the entire circumference of theback of the second semiconductor chip 16 in FIG. 4. In FIG. 5, referencenumeral 23 is the step formed on the entire circumference of the back ofthe second semiconductor chip 16, and has the size in the verticaldirection in FIG. 5 of about 50 μm, and the size in the horizontaldirection of about 100 μm. The step 23 is formed using etching ordicing.

[0034] The step 23 is formed for improving the adhesion of the sealingresin 8 to the second semiconductor chip 16, because if foreign matteradheres on the side of the second semiconductor chip 16 in FIG. 4 in themanufacturing process, sufficient adhesion to the sealing resin 8 cannotbe secured.

[0035] Fifth Embodiment

[0036] Next, Fifth Embodiment of the present invention will be describedbelow referring to the drawing. FIG. 6 is a sectional view schematicallyshowing the constitution of Fifth Embodiment. In FIG. 6, the same orcorresponding parts with those shown in FIG. 4 are denoted by the samereference numerals, and the description thereof will be omitted. What isdifferent from the semiconductor device shown in FIG. 4 is that theinner ends of outer leads 5 are bent to a substantially L-shape. In FIG.6, reference numeral 24 is substantially L-shaped bent portions formedon the inner ends of the outer leads 5, and are formed when the processmargin is insufficient when the circuit surface of the secondsemiconductor chip 16 in FIG. 4 is connected to the outer leads withwires 18. The process margin can be increased by forming a L-shaped bentportion 24 and by connecting the wires 18 to the ends 24A of theL-shaped bent portions 24.

[0037] Sixth Embodiment

[0038] Next, Sixth Embodiment of the present invention will be describedbelow referring to the drawing. FIG. 7 is a sectional view schematicallyshowing the constitution of Sixth Embodiment. In FIG. 7, the same orcorresponding parts with those shown in FIG. 6 are denoted by the samereference numerals, and the description thereof will be omitted. What isdifferent from the semiconductor device shown in FIG. 6 is that the backof the ends 24A of the L-shaped bent portions 24 are exposed to theenvironment, and terminals 25 are formed on the exposed portions forconnecting to external circuits. Even if the back of the ends 24A of theL-shaped bent portions 24 are exposed to the environment, thereliability of the device is not affected.

[0039] By such a constitution, the outer leads can be connected easilyto other circuits, and wiring becomes reliable.

[0040] The features and the advantages of the present invention may besummarized as follows.

[0041] In one aspect, a resin-sealed semiconductor device according tothe present invention comprises a first semiconductor chip whose circuitsurface is bonded to a surface of a die pad. The back surface of asecond semiconductor chip is bonded to the back surface of the firstsemiconductor chip. Wires are connecting each of the semiconductor chipsto outer leads. Further, a sealing resin is provided for encapsulatingthe die pad, the first and second semiconductor chips, and the wires,and the other surface of the die pad is exposed. As a result, the sizeof the circuit can be reduced by combining two semiconductor chips, suchas a memory and a microcomputer chip, or an SRAM and a flash memory, andthe thickness of a highly integrated resin-sealed semiconductor devicecan be thinned.

[0042] In another aspect, a resin-sealed semiconductor device accordingto the present invention comprises a first semiconductor chip whosecircuit surface is bonded to a surface of a die pad. The circuit surfaceof a second semiconductor chip is bonded to the back surface of thefirst semiconductor chip. The back surface of a third semiconductor chipis bonded to the back surface of the second semiconductor chip. Wiresconnect each of the semiconductor chips to outer leads. Further, asealing resin is provided for encapsulating the die pad, the first,second, and third semiconductor chips, and the wires. The other surfaceof the die pad is exposed. As a result, three semiconductor chips can bepackaged, and the thickness of a highly integrated resin-sealedsemiconductor device can be thinned. Also, since two of the threesemiconductor chips are bonded at the backs thereof, semiconductor chipsof the same size can be used.

[0043] In another aspect, a resin-sealed semiconductor device accordingto the present invention comprises a first semiconductor chip whosecircuit surface is bonded to a surface of a die pad. The back surface ofa second semiconductor chip is bonded to the back surface of the firstsemiconductor chip. The back surface of a third semiconductor chip isbonded to the circuit surface of the second semiconductor chip. Wiresconnect each of the semiconductor chips to outer leads. Further, asealing resin is provided for encapsulating the die pad, the first,second, and third semiconductor chips, and the wires so that the othersurface of the die pad is exposed. As a result, three semiconductorchips can be packaged, and the thickness of a highly integratedresin-sealed semiconductor device can be thinned. Also, since two of thethree semiconductor chips are bonded at the back surfaces thereof,semiconductor chips of the same size can be used.

[0044] In another aspect, a resin-sealed semiconductor device accordingto the present invention comprises a first semiconductor chip whosecircuit surface is bonded to a surface of a die pad. The circuit surfaceof a second semiconductor chip is bonded to the back surface of thefirst semiconductor chip. Wires connect each of the semiconductor chipsto outer leads. Further, a sealing resin is provided for encapsulatingthe die pad, the first and second semiconductor chips, and the wires sothat the other surface of the die pad and the back of the secondsemiconductor chip are exposed. As a result, the thickness of aresin-sealed semiconductor device comprising two semiconductor chips canfurther be thinned.

[0045] In another aspect, a resin-sealed semiconductor device accordingto the present invention has a step or cut-off portion formed on a partof the back surface of the second semiconductor chip. Accordingly, evenwhen foreign matter adheres to the side surface of the secondsemiconductor chip exposed to the environment during the manufacturingprocess, the sealing resin can be sufficiently adhered to the secondsemiconductor chip.

[0046] In another aspect, a resin-sealed semiconductor device accordingto the present invention, the inner ends of the outer leads are bent toa substantially L-shape. Accordingly, when the semiconductor chips areconnected to the outer leads with wires, the process margin can beincreased sufficiently.

[0047] In another aspect, a resin-sealed semiconductor device accordingto the present invention, the back of the ends bent to a substantiallyL-shape is allowed to expose from the sealing resin to be externalterminals. Accordingly, the outer leads can be connected easily to othercircuits, and wiring becomes reliable.

[0048] It is further understood that the foregoing description is apreferred embodiment of the disclosed device and that various changesand modifications may be made in the invention without departing fromthe spirit and scope thereof.

[0049] The entire disclosure of a Japanese Patent Application No.2002-121871, filed on Apr. 24, 2002 including specification, claims,drawings and summary, on which the Convention priority of the presentapplication is based, are incorporated herein by reference in itsentirety.

1. A resin-sealed semiconductor device comprising: a die pad; a firstsemiconductor chip whose circuit surface is bonded to a surface of saiddie pad; a second semiconductor chip whose back is bonded to the back ofsaid first semiconductor chip; wires for connecting each of saidsemiconductor chips to outer leads; and a sealing resin forencapsulating said die pad, said first and second semiconductor chipsand said wires so that the other surface of said die pad is exposed. 2.A resin-sealed semiconductor device comprising; a die pad; a firstsemiconductor chip whose circuit surface is bonded to a surface of saiddie pad; a second semiconductor chip whose circuit surface is bonded tothe back of said first semiconductor chip; a third semiconductor chipwhose back is bonded to the back of saig second semiconductor chip;wires for connecting each of said semiconductor chips to outer leads;and a sealing resin for encapsulating said die pad, said first, second,and third semiconductor chips and said wires so that the other surfaceof said die pad is exposed.
 3. A resin-sealed semiconductor devicecomprising; a die pad; a first semiconductor chip whose circuit surfaceis bonded to a surface of said die pad; a second semiconductor chipwhose back is bonded to the back of said first semiconductor chip; athird semiconductor chip whose back is bonded to the circuit surface ofsaid second semiconductor chip; wires for connecting each of saidsemiconductor chips to outer leads; and a sealing resin forencapsulating said die pad, said first, second, and third semiconductorchips and said wires so that the other surface of said die pad isexposed.
 4. A resin-sealed semiconductor device comprising; a die pad; afirst semiconductor chip whose circuit surface is bonded to a surface ofsaid die pad; a second semiconductor chip whose circuit surface isbonded to the back of said first semiconductor chip; wires forconnecting each of said semiconductor chips to outer leads; and asealing resin for encapsulating said die pad, said first and secondsemiconductor chips and said wires so that the other surface of said diepad and the back of said second semiconductor chip are exposed.
 5. Theresin-sealed semiconductor device according to claim 4, wherein a stepis formed on a part of the back of said second semiconductor chip. 6.The resin-sealed semiconductor device according to claim 4 or 5, whereinthe inner ends of said outer leads are bent to a substantially L-shape.7. The resin-sealed semiconductor device according to claim 6, whereinthe back of the ends bent to a substantially L-shape is allowed toexpose from said sealing resin to be external terminals.